Makefile: Fix compilation after header removal, try #2.

Makefile: Fix compilation after header removal, try #2.

This is a revised version of 3bc858ee0d9b, which got reverted in
f0b8296a0635 because of a flaw related to how CPPFLAGS was handled.

When switching from an older git version which still contains some
header file to a newer version where it got removed, a .d file remains
in build/deps which lists the no longer existing header file as a
prerequisite. This causes the build to fail because the prerequisite
cannot be created. The problem can be worked around by removing the
stale .d file, for example by running make clean, but this is no real
fix, and is inefficient.

The root of the matter is that .d files depend on their .c counterpart,
but this dependency is not stated anywhere in the Makefile. Thus, we
need a rule for the .d target with the same prerequisites and the same
recipe as the object file target. GNU make supports multiple targets,
but the feature does not seem to work as advertised, regardless of
whether rules with independent targets or rules with grouped targets
(using the &: separator) are employed. Thus we bite the bullet and
use two separate rules.

Another issue is that the CC command refers to CFLAGS and CPPFLAGS,
which get modified according to the target. We currently do this
modification only for object files but not for the dependency files,
so this needs to be fixed as well. We make use of make's "call"
function feature to avoid having to duplicate the file names and
patterns.