build: Tell make(1) that the compiler creates .d files.

The best way to convey the information that two files are created
by the same command involves rules with grouped targets (indicated
by the &: separator between targets and prerequisites). However,
since grouped targets is a relatively new feature of make(1) and we
would like to keep supporting older versions, we use ordinary rules
with multiple targets. This should not be worse because the compiler
is still run only once for each source file.

The patch also introduces the pre_deps make variable to make sure the
files listed in this variable are present before we run the compiler.

diff --git a/Makefile b/Makefile
index fb8a01d3282a6fddf3a7b4866a0af198ab0dd2f6..2ebb0debe99bacd4087a765a62322f415ac85b24 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -83,12 +83,20 @@ ifeq ($(findstring clean, $(MAKECMDGOALS)),)
 -include $(deps)
 endif
 
-# List osl.h in the prerequisites to make sure we generate it before attempting
-# to run the compiler. This matters only when the .d file does not exist.
-%.o: %.c osl.h Makefile errtab.h
+# The files to generate before attempting to run the compiler. These
+# are the order-only prerequisites in the rule below.
+pre_deps := osl.h errtab.h oslfsck.lsg.h
+
+# The .d and .o files are both created from a single cc invocation.
+define CC_CMD
        $(CC) $(OSL_CPPFLAGS) $(CPPFLAGS) \
-               -c -MMD -MF $(*F).d -MT $@ \
+               -c -MMD -MF $(*F).d -MT $(*F).o \
                $(OSL_CFLAGS) $(CFLAGS) $<
+endef
+%.o: %.c Makefile | $(pre_deps)
+       $(CC_CMD)
+%.d: %.c Makefile | $(pre_deps)
+       $(CC_CMD)
 
 fsck.o: oslfsck.lsg.h
 oslfsck: $(fsck_objects)